Emulation

linear gradient

PAN India

Posted, 21July 2026

MNC

The Company

MNC

The Role

Experience : 6 Years – 18 Years
Preferred Location : Bengaluru
Bands : B2/ B3 / C1
A good understanding of architectural aspects and RTL code at IP/Sub-system/SoC level
A good understanding of verification methodologies including SV-UVM/C based environment, transactors etc
Experience in building emulation models from scratch
Knowledge of Arm CPU cores, protocols including PCIe, USB, Ethernet, AMBA, UART/SPI/I2C, DDR, flash memories and their usage in SoC environments is necessary

7-10 Yrs
Must have worked in end-to-end Emulation of atleast 1-2 SoC programs in Sub-system and chip level
Any

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